1. Field of the Invention
The present invention relates to circuits and related methods for performing dithering on pixel data in a display, and more particularly to a circuit and related method for integrating a lookup table used by odd pixels and even pixels for reducing memory and logic gates required for performing dithering on the pixel data displayed in the display.
2. Description of the Prior Art
Dithering is a technique used when a display needs to display colors (or a color palette) not displayable by the display. By utilizing dithering, the display may display the non-displayable colors by mixing colors displayable by the display. Please refer to FIG. 1, which is a diagram of a dithering circuit 100 utilized in the prior art. As shown in FIG. 1, the dithering circuit 100 comprises a pixel counter 102, a line counter 104, a frame counter 106, a data segmenting module 108, a lookup table address encoder 110, a first lookup table 112, a second lookup table 114, and an overflow handling module 120. The pixel counter 102, the line counter 104, and the frame counter 106 are utilized for performing counting of a pixel clock, a line pulse, and a frame pulse being processed by the dithering circuit 100, respectively. The pixel counter 102 generates a 1-bit pixel count PN, the line counter 104 generates a 2-bit line count LN, and the frame counter 106 generates a 2-bit frame count FN. The data segmenting module 108 is utilized for splitting a 10-bit first odd pixel parameter ON1 into a 6-bit second odd pixel parameter ON2 and a 4-bit third odd pixel parameter ON3, and for splitting a 10-bit first even pixel parameter EN1 into a 6-bit second odd pixel parameter EN2 and a 4-bit third odd pixel parameter EN3. The four bits of the third odd pixel parameter ON3 are four bits having lowest weight of the 10-bit first odd pixel parameter ON1, namely the four least significant bits (LSBs). The four bits of the third even pixel parameter EN3 are four bits having lowest weight of the 10-bit first even pixel parameter EN1. The lookup table address encoder 110 combines the 4-bit third odd pixel parameter ON3 and third even pixel parameter EN3 with the 1-bit pixel count PN, the 2-bit line count LN, and the 2-bit frame count FN generated by the pixel counter 102, line counter 104, and frame counter 106, respectively, to generate a 9-bit odd pixel index parameter Index_Odd or a 9-bit even pixel index parameter Index_Even, respectively. The first lookup table 112 corresponds to the odd pixels, and stores a large number of odd pixel dithering parameters. The second lookup table 114 corresponds to the even pixels, and stores a large number of even pixel dithering parameters. The first lookup table 112 looks up a corresponding 1-bit odd pixel dithering parameter DO according to the odd pixel index parameter Index_Odd generated by the lookup table address encoder 110. The second lookup table 114 looks up a corresponding 1-bit even pixel dithering parameter DE according to the even pixel index parameter Index_Even generated by the lookup table address encoder 110. A first adder 122 adds the 6-bit second odd pixel parameter ON2 and the 1-bit odd pixel dithering parameter DO representing an odd pixel to generate a fourth odd pixel parameter ON4. The overflow handling module 120 determines whether the fourth odd parameter ON4 generates an overflow. If no overflow occurs, the six least significant bits of the fourth odd pixel parameter ON4, namely six bits of the fourth odd pixel parameter ON4 counted backward from the last bit thereof, may be directly outputted as a 6-bit output odd pixel parameter ON5. If overflow occurs in the fourth odd pixel parameter ON4, an upper threshold number of the 6-bit output odd pixel parameter ON5 is outputted, such as a binary sequence “111111”, which corresponds to 63 in decimal. A second adder 124 adds the 6-bit second even pixel parameter EN2 and the 1-bit even pixel dithering parameter DE representing an even pixel to generate a fourth even pixel parameter EN4. The overflow handling module 120 determines whether the fourth even parameter EN4 generates an overflow for determining a value of an output even pixel parameter EN5 and handling a similar overflow process to that described above for the fourth odd pixel parameter ON4.
It can be seen from FIG. 1 that the first lookup table 112 and the second lookup table 114 form a heavy burden on memory utilized by the dithering circuit 100, as the lookup parameters utilized by the first lookup table 112 or the second lookup table 114 must use four least significant bits from the original pixel data, and odd pixels and even pixels must be handled separately during lookup. For example, the lookup parameter Index_Odd utilized by the first lookup table 112 takes up nine bits, and each dithering parameter stored takes up one bit. Thus, the first lookup table 112 has a size of 29×1, for a total of 512 bits. The second lookup table 114 will also have a size of 512 bits. In other words, when the dithering circuit 100 is responsible for handling a single color subpixel, the amount of memory required is 512+512=1024 bits. If a normal RGB (red-green-blue) display requires three dithering circuits 100 for handling each colored subpixel, respectively, the total amount of memory required becomes 1024×3=3072 bits. Further, as memory requirements increase, greater circuit area is required, leading to higher hardware costs. Thus, the dithering circuit 100 shown in FIG. 1 has great room for improvement.